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Sept. 1995 Edition 3.0b DATA SHEET
MB510 2.7GHz TWO MODULUS PRESCALER
2.7GHz TWO MODULUS PRESCALER
The Fujitsu MB510 is an ultra high speed, two modulus prescaler that forms a Phase Locked Loop (PLL) when combined with a frequency synthesizer such as the Fujitsu MB87001A. It divides the input frequency by the modulus of 128/144 or 256/272, and operates at a low power supply current of 10mA at 5.0V. Through the use of Fujitsu's Advanced Process Technology, the MB510 achieves extremely small stray capacitance from its internal elements.
FEATURES
S S S S S S S S
High Frequency Operation: Power Dissipation: Pulse Swallow Function: Wide Operation Temperature: Stable Output Amplitude: Built-in Termination Resistor
2.7GHz max. 50mW typ. 128/144, 256/272 -40C to +85C VOUT = 1.6Vp-p typ.
PLASTIC PACKAGE FPT-08P-M01
Complete PLL synthesizer circuit with the Fujitsu MB87001A PLL synthesizer IC Package Standard 8-pin Flat Package
PIN ASSIGNMENT
(Suffix: -PF)
IN 1 2 TOP VIEW SW OUT 3 4 6 5 MC GND 8 7 IN NC
ABSOLUTE MAXIMUM RATINGS (See Note)
Rating Supply Voltage Input Voltage Output Current Storage Temperature
Note:
VCC
Symbol VCC VIN IO TSTG
Value -0.5 to +7.0 -0.5 to VCC 10 -55 to +125
Unit V V mA C
Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
Copyright E 1995 by FUJITSU LIMITED and FUJITSU MICROELECTRONICS, INC.
MB510
DQ C INPUT BUFFER IN IN
DQ CQ
DQ CM Q MC
DQ CQ
DQ CQ
DQ CQ
DQ CQ OUTPUT BUFFER OUT
DQ CQ
DQ SW Q
SW
SW H H L L Note:
MC H L H L
Divide Ratio 1/128 1/144 1/256 1/272
SW: H = VCC, L = open MC: H = 2.0V to VCC, L = GND to 0.8V
Figure 1. MB510 Block Diagram
PIN DESCRIPTION
Pin Number 1 2 3 4 5 6 7 8 Symbol IN VCC SW OUT GND MC NC IN Input DC Supply Voltage Divide Ratio Control Input (See Divide Ratio Table) Output Ground Modulus Control Input (See Divide Ratio Table) Non Connection Complementary Input Function
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MB510
RECOMMENDED OPERATING CONDITIONS
Value Parameter Supply Voltage Output Current Ambient Temperature Load Capacitance Symbol Min. VCC IO TA CL -40 4.5 Typ. 5.0 1.2 +85 8 Max. 5.5 V mA C pF Unit
ELECTRICAL CHARACTERISTICS
(Recommended Operating Conditions unless otherwise noted)
Value Parameter Supply Curent Output Amplitude Symbol ICC VO Built-in a termination resistor. Load capacitance = 8pF With input coupling capacitor 1000pF fIN = 10 to 2200MHz fIN = 2200 to 2700MHz 1.0 Condition Min. Typ. 10.0 1.6 Max. 15.0 mA Vp-p Unit
Input Frequency
fIN PIN VIHM VILM VIHS* VILS IIHM IILM tSET
10 -10 -4 2.0
2700 10
MHz
Input Signal Amplitude High Level Input Voltage for MC Input Low Level Input Voltage for MC Input High Level Input Voltage for SW Input Low Level Input Voltage for SW Input High Level Input Current for MC Input Low Level Input Current for MC Input Modulus Set-up Time MC to OUT
Note: *Design Guarantee
dBm 10 V 0.8 VCC -0.1 VCC Open VCC +0.1 V V V 0.4 -0.2 16 26 mA mA ns
VIH = 2.0V VIL = 0.8V
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MB510
VCC = +5.0V + 10% Sampling scope input point for input waveform VCC C1 P.G. 50 C2 IN IN CL MC GND OUT SW C3 Sampling scope prober point for output waveform
MC Input C1 : 1000pF C2 : 1000pF C3 : 0.1F CL : 8pF (including scope and jig capacitance)
Figure 2. Test Circuit
MINIMUM INPUT SIGNAL AMPLITUDE (mVp-p)
800 600 500 400 300 200 100
VCC = 5.0V TA = 25C
10
20
50 100 200 500 1000 2000 INPUT FREQUENCY (MHz)
Figure 3. Input Signal Amplitude vs. Input Frequency
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MB510
TIMING CHART (2 MODULUS)
Example: Divide ratio = 128/144 128 IN 144
64 OUT 64 64 64 64
64
64
80
64 64 80 64 80 64 80
MC
tSET
tSET
Note: When divide of 144 is selected, positive pulse is applied by 16 to 80. The typical set up time is 16 ns from the MC signal input to the timing of change of prescaler divide ratio.
C1 VCC C2 X1 12K VCC VCC 10K
VSX (Max. 8V)
16 15 14 13 12 11 10 9 MB 87001A
0.047F 12K
VCO
OUTPUT
1
234
56
78
100K 33K
VCC 10K
Clock Data LE 47K 47K 47K 1000pF
1000pF
8
7
6
5
MB 510
VCC
1
2
3
4
X1 VCC VSX C1, C2 : : : : 12.8MHz X'tal 5V + 10% 8V max. depends on crystal oscillator
1000pF
1000pF 2.2K
Lock Det. 10K
Figure 4. Typical Application Example
5
MB510
PACKAGE DIMENSIONS
(Suffix: -PF) 8-LEAD PLASTIC FLAT PACKAGE (CASE No: FPT-08P-M01)
) .010 .250 - .008 ) 0.25 6.35 - 0.20
.089(2.25) MAX (SEATED HEIGHT) .002(0.05) MIN (STAND OFF)
INDEX
.307+.016 (7.80+0.40) .209+.012 (5.30+0.30)
) .016 .268 - .008
) 0.40 6.80 - 0.20
.020+.008 (0.50+0.20) .050(1.27) TYP .150(3.81) REF "A" Details of "A" part
.008(0.20)
.018+.004 (0.45+0.10)
.005(0.13)
M
) .002 .006 - .001
) 0.05 0.15 - 0.02
.004(0.10)
.020(0.50) .007(0.18) MAX .027(0.68) MAX
(c) 1988 FUJITSU LIMITED F08002S-3C
DImensions in inches (millimeters)
All Rights Reserved. Circuit diagrams utilizing Fujitsu products are included as a means of illustrating typical semiconductor applications. Complete information sufficient for construction purposes is not necessarily given. The information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu assumes no responsibility for inaccuracies. The information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by Fujitsu. Fujitsu reserves the right to change products or specifications without notice. No part of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior written consent of Fujitsu.
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